Unidirectional Data Lane
A Unidirectional Data Lane supports data transmission only in the forward direction (Master → Slave).
| Lane Side | Required Functional Blocks | Optional |
|---|---|---|
| Master | HS-TX, LP-TX, CIL-MFXN |
— |
| Slave | HS-RX, LP-RX, CIL-SFXN |
ALP-ED (optional) |
| (See Lane Modules, and Lane Module Types.) |
Bi-directional Data Lanes
A Bi-directional Data Lane supports data transmission in both directions. Reverse communication may be supported using:
- Reverse High-Speed communication
- Reverse Escape Mode
- or both
The functional requirements depend on which reverse communication mechanisms are included.
Bi-directional Lane without High-Speed Reverse Communication
Reverse communication is supported only via Reverse Escape Mode.
| Lane Side | Required Functional Blocks | Optional | |
|---|---|---|---|
| Master | HS-TX, LP-TX, LP-RX, LP-CD, CIL-MFXY |
ALP-ED |
|
| Slave | HS-RX, LP-RX, LP-TX, LP-CD, CIL-SFXY |
ALP-ED |
Bi-directional Lane with High-Speed Reverse Communication
Reverse communication is supported by both:
- High-Speed Reverse signaling, and
- Reverse Escape Mode
| Lane Side | Required Functional Blocks | Optional |
|---|---|---|
| Master | HS-TX, HS-RX, LP-TX, LP-RX, LP-CD, CIL-MRXX |
ALP-ED |
| Slave | HS-RX, HS-TX, LP-RX, LP-TX, LP-CD, CIL-SRXX |
ALP-ED |
Although both ends contain similar blocks, the link remains asymmetric:
One side must be designated Master, and the other Slave.